Current Issue : April - June Volume : 2015 Issue Number : 2 Articles : 6 Articles
Multiplication is one of the basic functions used in digital signal processing (DSP). Multiplier applications are like convolution, filtering, FFT transform and ALU. Multiplier is hardware module. Multiplication operation involves a generation of partial products and their accumulation. The main objective of multipliers is to increase speed of multiplication by reducing the number of partial products. This paper presents various types of multipliers like array multiplier, booth multiplier, wallace multiplier and vedic multiplier. Each multiplier has its own advantages and disadvantages. Vedic multiplier is different from other multipliers. Different type of multipliers has analysis of performance parameter like delay, speed, area and power....
In this study, we present a miniOS kernel implemented via analysis of the context switching, the scheduler, and\nthe memory management of the original OS kernel for an embedded system based on ARM core. Since this is a\nlarge subject, we have limited our scope to them only that made up an embedded operating system. The implemented\nminiOS kernel is composed only by them, to the exclusion of all other functions of the original kernel.\nOur goal is to modify the OS kernel depending on the product function. The implementation method of the miniOS\nkernel can be applicable to any OS being mounted based on the ARM core. Modifying the kernel depending\non the product function can improve the OS booting speed as well as save the system memory. The functions\nof the scheduler, the context switching, and the memory management are described with the source in each section.\nThe miniOS kernel was implemented in the Assembly and C language and was verified through the build\nand the test. The results are shown in the Section 5....
To solve computationally expensive problems, multiple processor SoCs (MPSoCs) are frequently used. Mapping of\napplications to MPSoC architectures and scheduling of tasks are key problems in system level design of embedded systems.\nIn this paper, a cluster slack optimization algorithm is described, in which the tasks in a cluster are simultaneously\nmapped and scheduled for heterogeneous MPSoC architectures. In our approach, the tasks are iteratively clustered and\neach cluster is optimized by using the branch and bound technique to capitalize on slack distribution. The proposed\nstatic task mapping and scheduling method is applied to pipelined data stream processing as well as for batch processing.\nIn pipelined processing, the tradeoff between throughput and memory cost can be exploited by adjusting a weighting\nparameter. Furthermore, an energy-aware task mapping and scheduling algorithm based on our cluster slack optimization\nis developed. Experimental results show improvement in latency, throughput and energy....
Airborne communication terminal is a key unit in Ad hoc network of aircrafts. This paper mainly focuses on its implementation\nby embedded system, which is based on Samsung S3C2410 chip. System architecture, Linux tailoring and\ntouch-screen driver design are discussed in detail. Considering the requirements of stability and efficiency of the operating\nsystem, dynamic driver-loading method was employed firstly and only the necessary library files were transplanted\nto assist and test. The drivers finally were directly put into kernel configuration and then an integrated kernel\nwas transplanted. Regarding to the problem of positioning issues on touch-screen, which is implemented in this system,\nan accurate positioning method is also presented....
Network coding is becoming essential part of network systems since it enhances system performance in various ways. To take\nfull advantage of network coding, however, it is vital to guarantee low latency in the decoding process and thus parallelization of\nrandomnetwork coding has drawn broad attention fromthe network coding community. In this paper, we investigate the problem\nof parallelizing randomnetwork coding forembedded sensor systemswithmulticore processors. Recently, general purpose graphics\nprocessing unit (GPGPU) technology has paved the way for parallelizing random network coding; however, it is not an option on\nembedded sensor nodes without GPUs and thus it is indispensable to leverage multicore processors which are becoming more\ncommon in embedded sensor nodes. We propose a novel random network coding parallelization technique that can fully exploit\nmulticore processors. In our experiments, our parallel method exhibits over 150% throughput enhancement compared to existing\nstate-of-the-art implementations on an embedded system....
This paper presents the development of a microkernel with a device driver controller for embedded systems. The implementation\nwas done in C language aiming low cost microcontrollers. The proposed system allowed to perform soft\nreal-time activities while keeping the drivers and the application isolated by a secure layer. The callback system proved\nitself extremely simple to use while still maintaining the security of the system regarding the temporal constraints....
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